From: AR9341 Datasheet.
芯片功能:
| 项目 | 规格 | 备注 |
|---|---|---|
| CPU | MIPS 74Kc 533MHz | 集成64KB I-Cache与32KB D-Cache |
| 支持内存 | SDRAM/DDR1/DDR2 | 单片16位最高64MB,两片8位时最高128MB,频率最高400MHz |
| 支持Flash | SPI Nor Flash | |
| 802.11 MAC | 2×2:2 11bgn | 支持40M频宽,LDPC,STBC,最高300M |
| 802.11 RF | 可选扩展PA和LNA | 芯片自身1Mbps功率为17dBm,接收灵敏度为-96dBm |
| 内太网 | 集成5口10/100M Switch | 可将一个端口单独作为WAN PHY。支持IEEE 802.3az节能 |
| 硬件NAT | ||
| 串口 | 一个调试串口和一个高速串口 | 调试串口仅有TXD/RXD功能,支持115200bps。高速串口有TXD/RXD/,支持3Mbps。 |
| USB | 1个USB2.0 Host/Device接口 | 可选作为Host或Device模式 |
| 音频 | I2S、SPDIF两种音频接口 | |
| SLIC | 用于VOIP及PCM | |
| GPIO | 23个 | 可选配置成功能引脚(参考下方表格) |
| 时钟 | SDK可支持25MHz/40Mhz |
GPIO配置说明:
GPIO输出功能值:
| 值 | 功能 | 备注 |
|---|---|---|
| 4 | SLIC_DATA_OUT | SLIC data out |
| 5 | SLIC_PCM_FS | SLIC frame sync |
| 6 | SLIC_PCM_CLK | SLIC reference clock |
| 7 | SPI_CS_1 | SPI chip select 1 |
| 8 | SPI_CS_2 | SPI chip select 2 |
| 9 | SPI_CS_0 | SPI chip select 0 |
| 10 | SPI_CLK | SPI Clock |
| 11 | SPI_MOSI | SPI data output |
| 12 | I2S_CLK | I2S reference clock |
| 13 | I2S_WS | I2S word select for stereo |
| 14 | I2S_SD | I2S serial audio data |
| 15 | I2S_MCK | I2S master clock |
| 24 | UART0_SOUT | Low-speed UART0 serial data out |
| 25 | SPDIF_OUT | SPDIF data output |
| 26-30 | LED_ACTN[0-4] | 5 port Ethernet switch activity LEDs |
| 31-35 | LED_COLN[0-4] | 5 port Ethernet switch collision detect LEDs |
| 36-40 | LED_DUPLEXN[0-4] | 5 port Ethernet switch full duplex/half duplex LEDs |
| 41-45 | LED_LINK[0-4] | 5 port Ethernet switch link indicator LEDs |
| 46-47 | LNA_EXT[0-1] | External LNA control for chain 0-1 |
| 48 | TX_FRAME | MAC Tx frame (indicates the MAC is transmitting) |
| 49 | RX_CLEAR_EXTERNAL | WLAN active |
| 50 | LED_NETWORK_EN | MAC network enable |
| 51 | LED_POWER_EN | MAC power LED |
| 72 | WMAC_GLUE_WOW | MAC detected a WOW packet |
| 73 | BT_ANT | Indicates the BT is active |
| 74 | RX_CLEAR_EXTENSION | Medium clear for Rx |
| 78 | ETH_TX_ERR | MII transmit error |
| 79 | UART1_TD | High-speed UART1 transmit data |
| 80 | UART1_RTS | High-speed UART1 request to send |
| 84 | DDR_DQ_OE | DDR data output enable |
| 87 | USB_SUSPEND | USB suspend |
GPIO输出功能值:
| Reg | 功能 | 备注 |
|---|---|---|
| 0x18040044 7:0 | SPI_MISO | SPI data input |
| 0x18040044 15:8 | UART0_SIN | Low speed UART0 serial data in |
| 0x18040048 31:24 | I2S_MCLK | I2S master clock |
| 0x18040048 23:16 | I2S_CLK | I2S reference clock |
| 0x18040048 15:8 | I2S_MIC_SD | I2S serial MIC in data |
| 0x18040048 7:0 | I2S_WS | I2S word select for stereo |
| 0x18040054 15:8 | SLIC_PCM_FS | SLIC frame sync |
| 0x18040054 7:0 | SLIC_DATA_IN | SLIC data in |
| 0x18040068 31:24 | UART1_CTS | High-speed UART1 clear to send |
| 0x18040068 23:16 | UART1_RD | High-speed UART1 receive data |